The present invention relates to read only memories (ROMs), and more particularly to pseudo-static ROMs having a sense amplifier arrangement which lowers the power dissipated during normal READ operations.
Pseudo-static ROMs are commonly used in application specific integrated circuits (ASICs) and other types of integrated circuits which require "on-chip ROM" because of their lower power dissipation characteristics. A general description of a pseudo-static ROM ASIC cell is given at pages 609 and 610 of the NCR ASIC Data Book, published in 1989 by NCR Corporation, Dayton, Ohio. Pseudo-static ROMs are distinguishable from true static ROMs by the presence of dynamic loads on the bit lines of the former.
This dynamic load, which includes a precharger circuit, charges a first set of bit lines to a predetermined voltage. At the same time, a second identical precharger circuit precharger circuit charges a second set of bit lines to the same predetermined value. Each bit line in one set has a corresponding line that is part of the other set. After the precharger circuits have precharged their respective bit lines, a memory cell associated with a bit line of one of the sets is selected. Each bit line of the first set has a corresponding bit line in the second set, forming a pair of bit lines for accessing part of the pseudo static ROM. A sense amplifier is connected between a pair of bit lines and amplifies the difference between them until a stable state is attained. Each sense amplifier has a two terminal differential input and a high differential gain. Each of the differential input terminals is connected to a respective bit line of a bit line pair. Connected in this manner, each sense amplifier will invert, amplify and drive its differential input into two complementary binary states. Each sense amplifier has its differential outputs cross-coupled back to its inputs, in a manner similar to that of a flip-flop, such that once the sense amplifier attains a binary state, the cross-coupled, positive feedback will retain that state until after the ROM is again cycled into the precharge mode.
Commercially available pseudo-static ROMs use either slow, low power output buffers instead of the sense amplifiers, or they use fast sense amplifiers which dissipate static power during a READ of the bit lines. On a densely populated integrated circuits, the excess current and the excess heat dissipation of a heavily used ROM can become a limiting factor to how small the integrated circuit can be. And, since size effects processing speed and also integrated circuit manufacturing efficiency, it is desirable to reduce excess current and heat dissipation whenever possible.
Therefore, it is an object of this invention to provide a pseudo-static ROM device that has sense amplifiers and also has low power dissipation.
It is another object of this invention to provide a sense amplifier, and a precharger and dummy cell circuit arrangement for use in a pseudo-static ROM or similar device which operates with greatly reduced power dissipation.